John Hauser

Publications and Other Documents

The SFRA: A Corner-Turn FPGA Architecture.”
Nicholas Weaver, John Hauser, and John Wawrzynek.
In Proceedings of the 2004 ACM/SIGDA 12th International Symposium on Field-Programmable Gate Arrays (FPGA ’04, February 22–24, 2004), pp. 3–12.
Augmenting a Microprocessor with Reconfigurable Hardware.
John Reid Hauser.
Ph.D. Thesis, University of California, Berkeley (Fall 2000).
The Garp Architecture and C Compiler.”
Timothy J. Callahan, John R. Hauser, and John Wawrzynek.
Computer 33:4 (April 2000), pp. 62–69.
A Fixed-Point Recursive Digital Oscillator for Additive Synthesis.”
Todd Hodes, John Hauser, John Wawrzynek, Adrian Freed, and David Wessel.
In Proceedings of the IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP-99, March 15–19, 1999), pp. 993–996.
Garp: A MIPS Processor with a Reconfigurable Coprocessor.”
John R. Hauser and John Wawrzynek.
In Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM ’97, April 16–18, 1997), pp. 24–33.
Handling Floating-Point Exceptions in Numeric Programs.”
John R. Hauser.
ACM Transactions on Programming Languages and Systems 18:2 (March 1996), pp. 139–174.

John Hauser, 2005 February 2